RISC-V CPU simulator
desvolopat per Czech Technical University in Prague
Non verificat
RISC-V CPU simulator for education purposes
RISC-V processor architecture simulator for education purposes with pipeline and cache visualization.
Modificacions dins la version 0.9.8
fa environ 1 an
(Complilacion fa 5 meses)
Current project release.
Talha installada~3.32 MiB
Talha del telecargament1.72 MiB
Arquitecturas disponiblasaarch64, x86_64
Installacions9 150